SX1231
WIRELESS & SENSING PRODUCTS
6.5. IRQ and Pin Mapping Registers
Table 26 IRQ and Pin Mapping Registers
DATASHEET
Name
(Address)
Bits Variable Name
Mode
Default
Value
Description
RegDioMapping1
(0x25)
RegDioMapping2
(0x26)
7-6
5-4
3-2
1-0
7-6
5-4
3
2-0
Dio0Mapping
Dio1Mapping
Dio2Mapping
Dio3Mapping
Dio4Mapping
Dio5Mapping
-
ClkOut
rw
rw
rw
rw
rw
rw
r
rw
00
00
00
00
00
00
0
111
Mapping of pins DIO0 to DIO5
See Table 20 for mapping in Continuous mode
See Table 21 for mapping in Packet mode
unused
Selects CLKOUT frequency:
*
000 ? FXOSC
001 ? FXOSC / 2
010 ? FXOSC / 4
011 ? FXOSC / 8
100 ? FXOSC / 16
101 ? FXOSC / 32
110 ? RC (automatically enabled)
111 ? OFF
RegIrqFlags1
(0x27)
7
ModeReady
r
1
Set when the operation mode requested in Mode , is ready
- Sleep: Entering Sleep mode
- Standby: XO is running
- FS: PLL is locked
- Rx: RSSI sampling starts
- Tx: PA ramp-up completed
Cleared when changing operating mode.
6
RxReady
r
0
Set in Rx mode, after RSSI, AGC and AFC.
Cleared when leaving Rx.
5
TxReady
r
0
Set in Tx mode, after PA ramp-up.
Cleared when leaving Tx.
4
PllLock
r
0
Set (in FS, Rx or Tx) when the PLL is locked.
Cleared when it is not.
3
Rssi
rwc
0
Set in Rx when the RssiValue exceeds RssiThreshold.
Cleared when leaving Rx.
2
Timeout
r
0
Set when a timeout occurs (see TimeoutRxStart and
TimeoutRssiThresh )
Cleared when leaving Rx or FIFO is emptied.
1
AutoMode
r
0
Set when entering Intermediate mode.
Cleared when exiting Intermediate mode.
Please note that in Sleep mode a small delay can be
observed between AutoMode interrupt and the
corresponding enter/exit condition.
0
SyncAddressMatch
r/rwc
0
Set when Sync and Address (if enabled) are detected.
Cleared when leaving Rx or FIFO is emptied.
This bit is read only in Packet mode, rwc in Continuous
mode
Rev. 7 - June 2013
Page 71
www.semtech.com
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